adbms_afe_regs.h

#pragma once
 
/************************************************************************************************
 * @file   adbms_afe_regs.h
 *
 * @brief  Header file to define the ADBMS1818 AFE's register layout, configuration, and command code structures
 *
 * @date   2025-04-13
 * @author Midnight Sun Team #24 - MSXVI
 ************************************************************************************************/
 
/* Standard library Headers */
#include <assert.h>
 
/* Inter-component Headers */
 
/* Intra-component Headers */
 
#if defined(__GNUC__)
#define _PACKED __attribute__((packed))
#else
#define _PACKED
#endif
 
#define ADBMS1818_CELLS_IN_REG 3
#define ADBMS1818_GPIOS_IN_REG 3
 
#define AUX_ADG731_NUM_PINS 32
 
#define ADBMS1818_CMD_SIZE 4
 
#define ADBMS1818_NUM_COMM_REG_BYTES 3
 
#define ADBMS1818_NUM_PWMR_REGS 6
 
#define ADBMS1818_NUM_PSR_REGS 6         
#define ADBMS1818_NUM_PWM_REGS_IN_PSR 3  
#define ADBMS1818_NUM_SCTL_REGS_IN_PSR 3 
#define ADBMS1818_NUM_PWMS_REGS 6
 
#define ADBMS_AFE_MAX_CELLS_PER_DEVICE 18
typedef enum {
  ADBMS_AFE_REGISTER_CONFIG_A = 0,   
  ADBMS_AFE_REGISTER_CONFIG_B,       
  ADBMS_AFE_REGISTER_CELL_VOLTAGE_A, 
  ADBMS_AFE_REGISTER_CELL_VOLTAGE_B, 
  ADBMS_AFE_REGISTER_CELL_VOLTAGE_C, 
  ADBMS_AFE_REGISTER_CELL_VOLTAGE_D, 
  ADBMS_AFE_REGISTER_CELL_VOLTAGE_E, 
  ADBMS_AFE_REGISTER_CELL_VOLTAGE_F, 
  ADBMS_AFE_REGISTER_AUX_A,          
  ADBMS_AFE_REGISTER_AUX_B,          
  ADBMS_AFE_REGISTER_AUX_C,          
  ADBMS_AFE_REGISTER_AUX_D,          
  ADBMS_AFE_REGISTER_STATUS_A,       
  ADBMS_AFE_REGISTER_STATUS_B,       
  ADBMS_AFE_REGISTER_READ_COMM,      
  ADBMS_AFE_REGISTER_START_COMM,     
  NUM_ADBMS_AFE_REGISTERS            
} AdbmsAfeRegister;
 
typedef enum {
  ADBMS_AFE_VOLTAGE_REGISTER_A = ADBMS_AFE_REGISTER_CELL_VOLTAGE_A,
  ADBMS_AFE_VOLTAGE_REGISTER_B = ADBMS_AFE_REGISTER_CELL_VOLTAGE_B,
  ADBMS_AFE_VOLTAGE_REGISTER_C = ADBMS_AFE_REGISTER_CELL_VOLTAGE_C,
  ADBMS_AFE_VOLTAGE_REGISTER_D = ADBMS_AFE_REGISTER_CELL_VOLTAGE_D,
  ADBMS_AFE_VOLTAGE_REGISTER_E = ADBMS_AFE_REGISTER_CELL_VOLTAGE_E,
  ADBMS_AFE_VOLTAGE_REGISTER_F = ADBMS_AFE_REGISTER_CELL_VOLTAGE_F,
  NUM_ADBMS_AFE_VOLTAGE_REGISTERS
} AdbmsAfeVoltageRegister;
 
typedef enum {
  ADBMS_AFE_AUXILIARY_REGISTER_A = ADBMS_AFE_REGISTER_AUX_A,
  ADBMS_AFE_AUXILIARY_REGISTER_B = ADBMS_AFE_REGISTER_AUX_B,
  ADBMS_AFE_AUXILIARY_REGISTER_C = ADBMS_AFE_REGISTER_AUX_C,
  ADBMS_AFE_AUXILIARY_REGISTER_D = ADBMS_AFE_REGISTER_AUX_D,
  NUM_ADBMS_AFE_AUXILIARY_REGISTERS
} AdbsAfeAuxiliaryRegister;
 
typedef enum {
  ADBMS_AFE_DISCHARGE_TIMEOUT_DISABLED = 0, 
  ADBMS_AFE_DISCHARGE_TIMEOUT_30_S,         
  ADBMS_AFE_DISCHARGE_TIMEOUT_1_MIN,        
  ADBMS_AFE_DISCHARGE_TIMEOUT_2_MIN,        
  ADBMS_AFE_DISCHARGE_TIMEOUT_3_MIN,        
  ADBMS_AFE_DISCHARGE_TIMEOUT_4_MIN,        
  ADBMS_AFE_DISCHARGE_TIMEOUT_5_MIN,        
  ADBMS_AFE_DISCHARGE_TIMEOUT_10_MIN,       
  ADBMS_AFE_DISCHARGE_TIMEOUT_15_MIN,       
  ADBMS_AFE_DISCHARGE_TIMEOUT_20_MIN,       
  ADBMS_AFE_DISCHARGE_TIMEOUT_30_MIN,       
  ADBMS_AFE_DISCHARGE_TIMEOUT_40_MIN,       
  ADBMS_AFE_DISCHARGE_TIMEOUT_60_MIN,       
  ADBMS_AFE_DISCHARGE_TIMEOUT_75_MIN,       
  ADBMS_AFE_DISCHARGE_TIMEOUT_90_MIN,       
  ADBMS_AFE_DISCHARGE_TIMEOUT_120_MIN       
} AdbmsAfeDischargeTimeout;
 
typedef struct {
  uint8_t adcopt : 1; 
  uint8_t dten : 1;   
  uint8_t refon : 1;  
  uint8_t gpio : 5; 
  uint32_t undervoltage : 12; 
  uint32_t overvoltage : 12;  
  uint16_t discharge_bitset : 12; 
  uint8_t discharge_timeout : 4;  
} _PACKED AdbmsAfeConfigRegisterAData;
static_assert(sizeof(AdbmsAfeConfigRegisterAData) == 6, "AdbmsAfeConfigRegisterAData must be 6 bytes");
 
typedef struct {
  uint8_t gpio : 4; 
  uint8_t discharge_bitset : 7;        
  uint8_t discharge_timer_monitor : 1; 
  uint8_t path_select : 2; 
  uint8_t force_fail : 1;  
  uint8_t mute : 1; 
  uint8_t reserved1;
  uint8_t reserved2;
  uint8_t reserved3;
  uint8_t reserved4;
} _PACKED AdbmsAfeConfigRegisterBData;
static_assert(sizeof(AdbmsAfeConfigRegisterBData) == 6, "AdbmsAfeConfigRegisterBData must be 6 bytes");
 
typedef struct {
  uint8_t icom0 : 4;
  uint8_t d0 : 8;
  uint8_t fcom0 : 4;
 
  uint8_t icom1 : 4;
  uint8_t d1 : 8;
  uint8_t fcom1 : 4;
 
  uint8_t icom2 : 4;
  uint8_t d2 : 8;
  uint8_t fcom2 : 4;
} _PACKED AdbmsAfeCommRegisterData;
static_assert(sizeof(AdbmsAfeCommRegisterData) == 6, "AdbmsAfeCommRegisterData must be 6 bytes");
 
typedef struct {
  uint8_t wrcomm[ADBMS1818_CMD_SIZE];
  AdbmsAfeCommRegisterData reg;
  uint8_t pec;
} _PACKED AdbmsAfeWriteCommRegPacket;
 
typedef struct {
  uint8_t stcomm[ADBMS1818_CMD_SIZE];
  uint8_t clk[ADBMS1818_NUM_COMM_REG_BYTES];
} _PACKED AdbmsAfeSendCommRegPacket;
 
typedef struct {
  AdbmsAfeConfigRegisterAData cfg;
  uint16_t pec;
} _PACKED AdbmsAfeWriteConfigAPacket;
 
typedef struct {
  AdbmsAfeConfigRegisterBData cfg;
  uint16_t pec;
} _PACKED AdbmsAfeWriteConfigBPacket;
 
typedef union {
  uint16_t voltages[3]; 
  uint8_t values[6];    
} AdbmsAfeRegisterData;
static_assert(sizeof(AdbmsAfeRegisterData) == 6, "AdbmsAfeRegisterData must be 6 bytes");
 
typedef struct {
  AdbmsAfeRegisterData reg;
  uint16_t pec;
} _PACKED AdbmsAfeVoltageData;
static_assert(sizeof(AdbmsAfeVoltageData) == 8, "AdbmsAfeVoltageData must be 8 bytes");
 
typedef struct {
  AdbmsAfeRegisterData reg;
  uint16_t pec;
} _PACKED AdbmsAfeAuxData;
static_assert(sizeof(AdbmsAfeAuxData) == 8, "AdbmsAfeAuxData must be 8 bytes");
 
#define ADBMS1818_WRCFGA_RESERVED (1 << 0)                       
#define ADBMS1818_WRCFGB_RESERVED (1 << 5) | (1 << 2)            
#define ADBMS1818_RDCFGA_RESERVED (1 << 1)                       
#define ADBMS1818_RDCFGB_RESERVED (1 << 5) | (1 << 2) | (1 << 1) 
#define ADBMS1818_RDCVA_RESERVED (1 << 2)                       
#define ADBMS1818_RDCVB_RESERVED (1 << 2) | (1 << 1)            
#define ADBMS1818_RDCVC_RESERVED (1 << 3)                       
#define ADBMS1818_RDCVD_RESERVED (1 << 3) | (1 << 1)            
#define ADBMS1818_RDCVE_RESERVED (1 << 3) | (1 << 0)            
#define ADBMS1818_RDCVF_RESERVED (1 << 3) | (1 << 1) | (1 << 0) 
#define ADBMS1818_RDAUXA_RESERVED ((1 << 3) | (1 << 2))                       
#define ADBMS1818_RDAUXB_RESERVED ((1 << 3) | (1 << 2)) | (1 << 1)            
#define ADBMS1818_RDAUXC_RESERVED ((1 << 3) | (1 << 2)) | (1 << 0)            
#define ADBMS1818_RDAUXD_RESERVED ((1 << 3) | (1 << 2)) | (1 << 1) | (1 << 0) 
#define ADBMS1818_RDSTATA_RESERVED (1 << 4)            
#define ADBMS1818_RDSTATB_RESERVED (1 << 4) | (1 << 1) 
#define ADBMS1818_WRSCTRL_RESERVED (1 << 4) | (1 << 2)                     
#define ADBMS1818_WRPWM_RESERVED (1 << 5)                                  
#define ADBMS1818_WRPSB_RESERVED (1 << 4) | (1 << 3) | (1 << 2)            
#define ADBMS1818_RDSCTRL_RESERVED (1 << 4) | (1 << 2) | (1 << 1)          
#define ADBMS1818_RDPWM_RESERVED (1 << 5) | (1 << 2)                       
#define ADBMS1818_RDPSB_RESERVED (1 << 4) | (1 << 3) | (1 << 2) | (1 << 1) 
#define ADBMS1818_STSCTRL_RESERVED (1 << 4) | (1 << 3) | (1 << 0)          
#define ADBMS1818_CLRSCTRL_RESERVED (1 << 4) | (1 << 3)                    
#define ADBMS1818_ADCV_RESERVED ((1 << 9) | (1 << 6) | (1 << 5))                                    
#define ADBMS1818_ADOW_RESERVED ((1 << 3) | (1 << 5) | (1 << 9))                                    
#define ADBMS1818_CVST_RESERVED ((1 << 0) | (1 << 1) | (1 << 2) | (1 << 9))                         
#define ADBMS1818_ADAX_RESERVED (1 << 10) | (1 << 6) | (1 << 5)                                     
#define ADBMS1818_CLRCELL_RESERVED (1 << 0) | (1 << 4) | (1 << 8) | (1 << 9) | (1 << 10)            
#define ADBMS1818_CLRAUX_RESERVED (1 << 1) | (1 << 4) | (1 << 8) | (1 << 9) | (1 << 10)             
#define ADBMS1818_CLRSTAT_RESERVED (1 << 0) | (1 << 1) | (1 << 4) | (1 << 8) | (1 << 9) | (1 << 10) 
#define ADBMS1818_PLADC_RESERVED (1 << 2) | (1 << 4) | (1 << 8) | (1 << 9) | (1 << 10)              
#define ADBMS1818_DIAGN_RESERVED (1 << 0) | (1 << 2) | (1 << 4) | (1 << 8) | (1 << 9) | (1 << 10)   
#define ADBMS1818_WRCOMM_RESERVED (1 << 0) | (1 << 5) | (1 << 8) | (1 << 9) | (1 << 10)             
#define ADBMS1818_RDCOMM_RESERVED (1 << 1) | (1 << 5) | (1 << 8) | (1 << 9) | (1 << 10)             
#define ADBMS1818_STCOMM_RESERVED (1 << 0) | (1 << 1) | (1 << 5) | (1 << 8) | (1 << 9) | (1 << 10)
 
#define ADBMS1818_GPIO1_PD_ON (0 << 3)
#define ADBMS1818_GPIO1_PD_OFF (1 << 3)
#define ADBMS1818_GPIO2_PD_ON (0 << 4)
#define ADBMS1818_GPIO2_PD_OFF (1 << 4)
#define ADBMS1818_GPIO3_PD_ON (0 << 5)
#define ADBMS1818_GPIO3_PD_OFF (1 << 5)
#define ADBMS1818_GPIO4_PD_ON (0 << 6)
#define ADBMS1818_GPIO4_PD_OFF (1 << 6)
#define ADBMS1818_GPIO5_PD_ON (0 << 7)
#define ADBMS1818_GPIO5_PD_OFF (1 << 7)
#define ADBMS1818_GPIO6_PD_ON (0 << 0)
#define ADBMS1818_GPIO6_PD_OFF (1 << 0)
#define ADBMS1818_GPIO7_PD_ON (0 << 1)
#define ADBMS1818_GPIO7_PD_OFF (1 << 1)
#define ADBMS1818_GPIO8_PD_ON (0 << 2)
#define ADBMS1818_GPIO8_PD_OFF (1 << 2)
#define ADBMS1818_GPIO9_PD_ON (0 << 3)
#define ADBMS1818_GPIO9_PD_OFF (1 << 3)
 
#define ADBMS1818_CNVT_CELL_ALL 0x00     
#define ADBMS1818_CNVT_CELL_1_7_13 0x01  
#define ADBMS1818_CNVT_CELL_2_8_14 0x02  
#define ADBMS1818_CNVT_CELL_3_9_15 0x03  
#define ADBMS1818_CNVT_CELL_4_10_16 0x04 
#define ADBMS1818_CNVT_CELL_5_11_17 0x05 
#define ADBMS1818_CNVT_CELL_6_12_18 0x06 
#define ADBMS1818_ADCV_DISCHARGE_NOT_PERMITTED (0 << 4)
#define ADBMS1818_ADCV_DISCHARGE_PERMITTED (1 << 4)
 
#define ADBMS1818_ADAX_GPIO_ALL 0x00                 
#define ADBMS1818_ADAX_GPIO1_6 0x01                  
#define ADBMS1818_ADAX_GPIO2_7 0x02                  
#define ADBMS1818_ADAX_GPIO3_8 0x03                  
#define ADBMS1818_ADAX_GPIO4_9 0x04                  
#define ADBMS1818_ADAX_GPIO5 0x05                    
#define ADBMS1818_ADAX_REF2 0x06                     
#define ADBMS1818_ADAX_MODE_FAST (0 << 8) | (1 << 7) 
#define ADBMS1818_ICOM_CSBM_LOW (1 << 3)                                     
#define ADBMS1818_ICOM_CSBM_FALL_EDGE (1 << 3) | (1 << 0)                    
#define ADBMS1818_ICOM_CSBM_HIGH (1 << 3) | (1 << 1)                         
#define ADBMS1818_ICOM_NO_TRANSMIT (1 << 3) | (1 << 2) | (1 << 1) | (1 << 0) 
#define ADBMS1818_FCOM_CSBM_LOW (0 << 0)             
#define ADBMS1818_FCOM_CSBM_HIGH (1 << 3) | (1 << 0) 
#define ADBMS1818_PWMC_DC_100 100