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#define | MCP2515_CMD_RESET 0xC0 |
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#define | MCP2515_CMD_READ 0x03 |
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#define | MCP2515_CMD_READ_RX 0x90 |
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#define | MCP2515_CMD_WRITE 0x02 |
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#define | MCP2515_CMD_LOAD_TX 0x40 |
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#define | MCP2515_CMD_RTS 0x80 |
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#define | MCP2515_CMD_READ_STATUS 0xA0 |
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#define | MCP2515_CMD_RX_STATUS 0xB0 |
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#define | MCP2515_CMD_BIT_MODIFY 0x05 |
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#define | MCP2515_READ_RXB0SIDH 0x00 |
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#define | MCP2515_READ_RXB0D0 0x02 |
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#define | MCP2515_READ_RXB1SIDH 0x04 |
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#define | MCP2515_READ_RXB1D0 0x06 |
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#define | MCP2515_LOAD_TXB0SIDH 0x00 |
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#define | MCP2515_LOAD_TXB0D0 0x01 |
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#define | MCP2515_LOAD_TXB1SIDH 0x02 |
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#define | MCP2515_LOAD_TXB1D0 0x03 |
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#define | MCP2515_LOAD_TXB2SIDH 0x04 |
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#define | MCP2515_LOAD_TXB2D0 0x05 |
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#define | MCP2515_RTS_TXB0 0x01 |
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#define | MCP2515_RTS_TXB1 0x02 |
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#define | MCP2515_RTS_TXB2 0x04 |
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#define | MCP2515_STATUS_RX0IF 0x01 |
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#define | MCP2515_STATUS_RX1IF 0x02 |
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#define | MCP2515_STATUS_TX0REQ 0x04 |
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#define | MCP2515_STATUS_TX0IF 0x08 |
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#define | MCP2515_STATUS_TX1REQ 0x10 |
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#define | MCP2515_STATUS_TX1IF 0x20 |
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#define | MCP2515_STATUS_TX2REQ 0x40 |
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#define | MCP2515_STATUS_TX2IF 0x80 |
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#define | MCP2515_CTRL_REG_BFPCTRL 0x0C |
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#define | MCP2515_CTRL_REG_TXRTSCTRL 0x0D |
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#define | MCP2515_CTRL_REG_CANSTAT 0x0E |
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#define | MCP2515_CTRL_REG_CANCTRL 0x0F |
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#define | MCP2515_CTRL_REG_TEC 0x1C |
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#define | MCP2515_CTRL_REG_REC 0x1D |
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#define | MCP2515_CTRL_REG_CNF3 0x28 |
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#define | MCP2515_CTRL_REG_CNF2 0x29 |
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#define | MCP2515_CTRL_REG_CNF1 0x2A |
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#define | MCP2515_CTRL_REG_CANINTE 0x2B |
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#define | MCP2515_CTRL_REG_CANINTF 0x2C |
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#define | MCP2515_CTRL_REG_EFLG 0x2D |
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#define | MCP2515_CTRL_REG_TXB0CTRL 0x30 |
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#define | MCP2515_CTRL_REG_TXB1CTRL 0x40 |
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#define | MCP2515_CTRL_REG_TXB2CTRL 0x50 |
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#define | MCP2515_CTRL_REG_RXB0CTRL 0x60 |
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#define | MCP2515_CTRL_REG_RXB1CTRL 0x70 |
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#define | MCP2515_TX_CTRL_BIT_ABTF (1 << 6) |
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#define | MCP2515_TX_CTRL_BIT_MLOA (1 << 5) |
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#define | MCP2515_TX_CTRL_BIT_TXERR (1 << 4) |
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#define | MCP2515_REG_RXF0SIDH 0x00 |
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#define | MCP2515_REG_RXF1SIDH 0x04 |
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#define | MCP2515_REG_RXF2SIDH 0x08 |
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#define | MCP2515_REG_RXF3SIDH 0x10 |
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#define | MCP2515_REG_RXF4SIDH 0x14 |
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#define | MCP2515_REG_RXF5SIDH 0x18 |
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#define | MCP2515_REG_RXM0SIDH 0x20 |
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#define | MCP2515_REG_RXM1SIDH 0x24 |
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#define | MCP2515_CANCTRL_OPMODE_MASK 0xE0 |
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#define | MCP2515_CANCTRL_OPMODE_NORMAL 0x00 |
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#define | MCP2515_CANCTRL_OPMODE_SLEEP 0x20 |
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#define | MCP2515_CANCTRL_OPMODE_LOOPBACK 0x40 |
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#define | MCP2515_CANCTRL_OPMODE_LISTEN 0x60 |
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#define | MCP2515_CANCTRL_OPMODE_CONFIG 0x80 |
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#define | MCP2515_CANCTRL_CLKOUT_MASK 0x07 |
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#define | MCP2515_CANCTRL_CLKOUT_CLKPRE_1 0x04 |
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#define | MCP2515_CANCTRL_CLKOUT_CLKPRE_2 0x05 |
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#define | MCP2515_CANCTRL_CLKOUT_CLKPRE_4 0x06 |
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#define | MCP2515_CANCTRL_CLKOUT_CLKPRE_8 0x07 |
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#define | MCP2515_CNF3_PHSEG2_MASK 0x07 |
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#define | MCP2515_CNF2_BTLMODE_MASK 0x80 |
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#define | MCP2515_CNF2_BTLMODE_CNF3 0x80 |
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#define | MCP2515_CNF2_SAMPLE_MASK 0x40 |
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#define | MCP2515_CNF2_SAMPLE_3X 0x40 |
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#define | MCP2515_CNF2_PHSEG1_MASK 0x38 |
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#define | MCP2515_CNF2_PRSEG_MASK 0x07 |
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#define | MCP2515_CNF1_BRP_MASK 0x3F |
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#define | MCP2515_CANINT_MSG_ERROR 0x80 |
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#define | MCP2515_CANINT_WAKEUP 0x40 |
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#define | MCP2515_CANINT_EFLAG 0x20 |
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#define | MCP2515_CANINT_TX2IE 0x10 |
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#define | MCP2515_CANINT_TX1IE 0x08 |
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#define | MCP2515_CANINT_TX0IE 0x04 |
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#define | MCP2515_CANINT_RX1IE 0x02 |
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#define | MCP2515_CANINT_RX0IE 0x01 |
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#define | MCP2515_EFLG_RX1_OVERFLOW 0x80 |
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#define | MCP2515_EFLG_RX0_OVERFLOW 0x40 |
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#define | MCP2515_EFLG_TX_BUS_OFF 0x20 |
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#define | MCP2515_EFLG_TX_EP_FLAG 0x10 |
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#define | MCP2515_EFLG_RX_EP_FLAG 0x08 |
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#define | MCP2515_EFLG_TX_WARNING 0x04 |
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#define | MCP2515_EFLG_RX_WARNING 0x02 |
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#define | MCP2515_EFLG_ERROR_WARNING 0x01 |
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#define | MCP2515_TXBNDLC_RTR_SHIFT 6 |
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#define | MCP2515_TXBNDLC_RTR_FRAME 0x40 |
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#define | MCP2515_TXBNDLC_DLC_MASK 0x0F |
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#define | MCP2515_RXB0CTRL_BUKT 0x4 |
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#define | MCP2515_MAX_WRITE_BUFFER_LEN 10 |
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#define | MCP2515_STANDARD_ID_LEN 11 |
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#define | MCP2515_EXTENDED_ID_LEN 18 |
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#define | MCP2515_CAN_BRP_125KBPS 3 |
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#define | MCP2515_CAN_BRP_250KBPS 1 |
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#define | MCP2515_CAN_BRP_500KBPS 0 |
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#define | MCP2515_NUM_MASK_REGISTERS_STANDARD 2 |
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#define | MCP2515_NUM_MASK_REGISTERS_EXTENDED 4 |
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#define | MCP2515_BFPCTRL_B1BFS 0x20 |
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#define | MCP2515_BFPCTRL_B2BFS 0x10 |
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#define | MCP2515_BFPCTRL_B1BFE 0x08 |
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#define | MCP2515_BFPCTRL_B2BFE 0x04 |
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#define | MCP2515_BFPCTRL_B1BFM 0x02 |
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#define | MCP2515_BFPCTRL_B2BFM 0x01 |
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#define | CURRENT_SCALE 100 |
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#define | VOLTAGE_SCALE 100 |
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#define | VELOCITY_SCALE 100 |
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#define | TEMP_SCALE 100 |
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#define | ACCERLATION_FORCE 1 |
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#define | CRUISE_THROTTLE_THRESHOLD 0 |
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#define | TORQUE_CONTROL_VEL 20000 |
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#define | MATH_PI 3.14 |
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#define | WHEEL_DIAMETER 0.57147 |
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#define | VEL_TO_RPM_RATIO (60 / (2 * MATH_PI) * WHEEL_DIAMETER) |
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#define | CONVERT_VELOCITY_TO_KPH 13234 |
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#define | DRIVER_CONTROL_BASE 0x500 |
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#define | MOTOR_CONTROLLER_BASE_L 0x400 |
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#define | MOTOR_CONTROLLER_BASE_R 0x80 |
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#define | MAX_COASTING_THRESHOLD 0.4f |
| Max pedal threshold when coasting at speeds > 8 km/h.
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#define | MAX_OPD_SPEED 16.0f |
| Max car speed in km/h before one pedal drive threshold maxes out.
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#define | COASTING_THRESHOLD_SCALE 0.025f |
| Scaling value to determine the coasting threshold based on speed.
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#define | PRECHARGE_EVENT_IT 0U |
| Precharge interrupt notification.
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